Many electronic systems utilize a memory controller and a corresponding memory. The memory controller controls operation of the memory by issuing commands to the memory. For a given type of memory, the memory controller must issue commands in a sequence that complies with timing requirements and command dependencies of the particular memory being used. Before issuing a command, the memory controller must satisfy these timing requirements and dependencies.
The memory controller has a significant amount of freedom as to the order of commands issued to the memory. The memory controller may issue commands in any of a variety of different sequences. While all sequences issued by the memory controller must conform to the command timing requirements and dependencies of the memory, some command sequences are more efficient than others.
When analyzing an electronic system, designers typically rely upon text logs of signals sent from the memory controller to the memory. In other cases, designers view waveforms of the individual signals from the memory controller to the memory presented on a linear timeline. Such interfaces, however, are not intuitive for purposes of evaluating performance or debugging the electronic system.